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Innovative Die Attach Solutions for Advanced BLT Control

24.06.2024

In the semiconductor industry chain, the three key nodes of chip design, wafer manufacturing, packaging and testing constitute the complete process of chip manufacturing.

Currently, as chip process technology continues to evolve, the pace of Moore's Law iteration has slowed down, and chip manufacturing is facing the dual challenges of physical limitations and diminishing economic benefits. At the same time, driven by the demand for multifunctionality and miniaturization of electronic devices, the development of integrated circuits is also trending towards integrating more functions into smaller modules.

Therefore, as Moore's Law approaches its limit, the industry is gradually shifting from the past emphasis on transistor process scaling and the advancement of wafer manufacturing technology nodes to the innovation of packaging technology.

As an important part of the core semiconductor industry chain, the continuous development of packaging technology plays a crucial role in meeting the growing demand for chip integration and more diverse high-performance requirements. Packaging technologies represented by advanced packaging and 2.5D/3D solutions are becoming an important guarantee to support the continuous improvement of chip system performance.

In the post-Moore's Law era, the packaging industry has become a highly contested field, and using packaging technology to meet the needs of system miniaturization and multifunctionality has become a new engine for the development of the integrated circuit industry.

Among them, die bonding is an important process in the chip packaging flow. Die bonding is the process of fixing the chip, also called Die Bond or chip placement, which means using die attach adhesive to attach the bare chip (die) to the specified area of the substrate, forming a thermal or electrical path, and providing the conditions for the subsequent wire bonding process.

The die bonding process can be decomposed into material feeding, glue dispensing, chip pickup, chip placement, and wire bonding process flows, which fix the chip on the substrate and achieve very high bonding accuracy, requiring the use of die bonders to complete this process.

Die Attach Process

Specifically, after the wafer dicing process is completed, the bare chips (die) will be separated into individual modules and lightly attached to the dicing tape. Subsequently, the bonding arm will pick up the chips one by one from the dicing tape and place them on the substrate where the adhesive has already been dispensed.

In the chip bonding process, the use of epoxy resin to achieve adhesion is a common practice. When using epoxy resin for chip bonding, the appropriate amount of epoxy resin is precisely dispensed onto the substrate. After placing the chip on the substrate, through reflow or curing, the epoxy resin is hardened under high-temperature conditions, thereby bonding the chip and the substrate together.

The significant challenges faced in the die bonding process as the semiconductor industry continues to advance. Some of the key challenges include:

  • Materials Complexity: The use of sintered silver adhesives for power devices and RF power amplifiers in the 5G era brings new material characteristics that are more difficult to control compared to traditional silver adhesives. Accommodating the thin 50-75um chips made of GaAs/GaN compounds further compounds the material integration challenges.
  • Process Control: Inconsistent bond line thickness (BLT) of the epoxy resin, placement offsets, and inaccurate dispensing can lead to die warpage, tilting, epoxy overspill, and voids, which then impact the subsequent bonding process.
  • Placement Accuracy: Challenges remain in achieving the right bonding force, accurate die-to-substrate positioning, preventing epoxy leakage, and managing aspect ratios. Improper handling can result in epoxy spill, die position errors, warpage, or placement failures, ultimately damaging the chips and affecting yield.

These multifaceted challenges in the die bonding process, stemming from shrinking chip sizes, increasing performance requirements, and new material complexities, pose significant hurdles for packaging companies. Overcoming these issues is critical to ensuring high packaging yields and reliability, particularly for advanced applications like 5G power electronics. Innovative die bonding solutions that can precisely address these process control and placement accuracy challenges will be essential for the semiconductor industry to continue progressing.

In addition to the challenges mentioned, the emerging third-generation semiconductor materials like SiC and GaN also bring new difficulties to the die bonding process. Due to the thin, hard, and brittle material characteristics of these compounds, the high-frequency, high-speed, and precise "pick-up" operation of the "bare chips" becomes more challenging.

In the die bonding step, there are also challenges in terms of controlling the dispensing amount, die placement accuracy, as well as managing the voids and adhesion strength within the epoxy. These issues can easily lead to problems like die placement failures, excess epoxy overflow, and die cracking.

Especially as the requirements for packaging technology and dimensions continue to increase, the demand for ever-thinner chips poses new challenges to maintaining a stable bond line thickness (BLT). As chip sizes shrink, the adhesive usage must decrease. Too much adhesive can cause chip sliding or overflow, while too little can lead to chip detachment. Non-uniform BLT can also result in chip cracking or tilting, impacting the subsequent bonding steps.

In summary, the die bonding process faces multifaceted demands and challenges in terms of precision, efficiency, and reliability during actual production. To break through these barriers, chip manufacturers need to collaborate with equipment and material suppliers to meet the increasingly stringent performance and reliability requirements of the market and customers.

In light of these market needs and challenges, ASMPT has introduced the INFINITE die bonder, leveraging its technological advantages to provide new value for the industry and customers. The INFINITE offers advantages in areas like dispensing control, BLT management, precision pick-up, chip stacking placement, and bonding force control. This equipment features high safety, accuracy, stability, and consistency, and can provide real-time compensation functions to help customers improve chip yields and reduce production costs, delivering substantial value.

To address the trends and challenges, the semiconductor packaging equipment industry is in an important process of upgrading its industrial value chain. To solve the problems of precision, reliability and high yield in chip die bonding, the semiconductor packaging equipment giant ASMPT has launched the INFINITE die bonder, helping the industry tackle the difficulties and challenges in the chip die bonding process.

The INFINITE Die Bonder (image source: ASMPT website)
ASMPT Complete line Solutions for General IC Discrete, Analog, Logic

It is understood that the INFINITE is a die bonder designed for 12-inch wafer processing. Its advantage lies in the excellent control of bond line thickness (BLT). Through non-contact measurement, it can accurately complete the dispensing step. Meanwhile, it has excellent XY positioning accuracy and bonding force control, allowing for precise chip pick-up and placement. It also features real-time compensation functions to promptly verify and correct any issues that may arise during the process.

It is reported that INFINITE covers a variety of packaging types, including BGA, LGA, MEMS, QFN, DFN, etc., as well as different chip categories such as logic devices, analog devices, power management ICs, MEMS, and discrete devices. It serves a wide range of application markets, including automotive electronics, consumer electronics, and medical electronics, meeting the relevant requirements of different markets and customers in terms of precision, efficiency, consistency and cost.

Facing the differences in specific process technology and parameter control for different niche product packaging and testing, packaging equipment manufacturers need to carry out customized development of core modules and software algorithms to match the scenario needs of customers. Especially against the backdrop of iterative upgrades in IC and LED packaging and testing technologies, equipment manufacturers must continuously track the process change demands of industry customers and respond quickly to diverse market needs.

The die bonding process poses high technical requirements for packaging and testing equipment suppliers, including die bonders. Die bonding is a precision manufacturing process that demands smooth pick-and-place motion and accurate placement.

As an essential equipment for semiconductor chip packaging and LED packaging, die bonders need to overcome technical challenges in multiple domains, such as software architecture, simulation, precision mechanics, and motion control. ASMPT's core competitiveness lies in its ability to build a powerful technology barrier integrating hardware and software.

Its "Smart Dispensing Control: Epoxy A.I." provides intelligent epoxy control technology.

The "In Process Control: TAIJI" enables precise chip pick-up and bonding process control, achieving the optimal balance between product quality and production capacity. These technologies fully meet the ever-increasing process standards and can handle various challenges such as:

  • Bond Line Thickness (BLT) control
  • Epoxy Bleed Out
  • Fillet Height
  • Epoxy Coverage
  • Die Placement & Rotation Accuracy
  • Die Tilt
  • Crack-Free

The operating system principles encompass technologies related to high-speed precision positioning control, vision-based positioning control, and pneumatic pick-up control - an integrated opto-electro-mechanical system. It supports programmable speed, acceleration, and force control, making BLT control, precise pick-and-place, high productivity, and high yield the core technical keywords of the INFINITE die bonder.

Furthermore, INFINITE is also capable of addressing the challenges faced by wide-bandgap semiconductors like SiC and GaN in the die bonding stage, with advantages in safety, reliability, consistency, and production cost, bringing more value to customers.

The Packaging Equipment Market Welcomes a "New Blue Ocean".

In recent years, with the continuous enrichment of downstream application scenarios, the requirements for process technology in the packaging and testing link have been constantly increasing. Semiconductor packaging and testing have gradually entered the core of the industrial chain, becoming one of the main pillars for extending Moore's Law.

The packaging and testing equipment industry, as one of the core links in the industrial chain, has become a "blue ocean" market and is expected to usher in long-term structural growth.

The global semiconductor packaging and testing equipment market has always maintained an oligopolistic monopolistic competitive landscape, with a high degree of industry concentration. In the field of packaging equipment, where the requirements for precision, speed, stability, and consistency are higher, ASMPT has long been in a dominant position.

The launch of the INFINITE equipment has confirmed ASMPT's continuous and in-depth layout in the chip packaging field, combining Epoxy A.I. and TAIJI control technologies to achieve the optimal balance between product quality and production capacity. In the future, the semiconductor industry will still be full of various challenges and opportunities. ASMPT will continue to utilize its accumulated experience over the years and its unique solutions, combined with its leading equipment and intelligent software available for automated monitoring and production optimization, to help IC semiconductor packaging manufacturers take a big step towards the goal of "quality, efficiency, and speed breakthroughs", deeply understand the product production process and challenges faced by customers in the industry, and continuously develop high-quality solutions to help customers enhance their competitive advantages.

Accompanying this, while ASMPT provides value to the industry and customers, it further enhances its own market position and industry competitiveness and embraces greater breakthroughs under the wave of opportunities in the semiconductor industry.

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